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Language: Reset Sequence
Description A reset sequence is a series of commands which, when issued, brings a chip to the ready state. When a chip is powered on or encounters an error, it may be in an arbitrary state. The reset sequence ensures that the chip is appropriately (re-)initialized for subsequent tasks. The state control of a chip is typically modeled after a finite automaton. (Please refer to Problem 3599 Given the description of the control logic of a chip, compute the shortest reset sequence. Input The input consists of a single test case. The first line contains two integers Immediately following the first line comes an δ_{ij}}_{n×m} with zero-based indices. Each element δ_{ij} (0 ≤ δ_{ij} ≤ n − 1) indicates that when the chip receives command j in state i, it transits to state δ_{ij} .Output Output the shortest reset sequence using its representation by hexadecimal digits. If there are multiple such sequences, output any one. If there are no such sequences, output an asterisk (“ Sample Input 3 4 2 1 1 2 1 0 0 0 0 0 0 1 Sample Output 101 Source |

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